Cascode Question
I should preface this by saying that the circuit I'm working will be on a PCB rather a piece of silicon. My circuit is part of a larger integrator type device. The voltage on the cap runs between about -11V and -19V. Q11/Q12 form a current steering switch meant to either steer constant charge into the cap or completely away from the cap. Q13 is a cascode stage meant to hide the switch and constant current source from the large voltage swing on the cap as well as limit Vceo across Q12. The -9V on Q13 is to be supplied by an LDO. Probably I'll have a low value resistor plus some caps on the base for filtering. RampEnable will swing between -7.5V and -8.5V (approx.). When Q11 is conducting and Q12 is off there will be no current on the emitter of Q13. Do I need to worry about leakage out of the collector of Q13 into my capacitor in this configuration? A second question I have is about the magnitude of charge injection when current is switched into Q13 and when it is switched away from Q13. Ideally of course it would be zero but that seems unlikely to be the case in the real world. A resistor between emitter and base would stabilise the emitter but that results in current loss through the resistor when Q12 is on which will have a temperature dependance I'm hoping to avoid. The cap is about 150pF and the current is around 10 mA. Thanks for your advice!