r/GowinFPGA

Hey everyone, I wanted to share a personal project I just finished. I built this mainly to dive deep and learn more about VLSI, SystemVerilog, and how CNNs actually execute at the silicon level.

It’s an end-to-end SoC running a quantized MicroCNN on a Sipeed Tang Nano 20K, and right now I have it classifying biological images from the BloodMNIST dataset over a UART bridge. For the architecture, I wrote the entire datapath from scratch. It uses parallel spatial MAC arrays for the convolutional layers and parallel FC MACs for the linear layers, so it's not just relying on simple time-division multiplexing. The weights are quantized to INT8 and biases to INT32. I also got glitchless clock gating working with the Gowin DCS, meaning the NPU completely powers down during idle states.

The design runs at 30 MHz, and an end-to-end inference takes about 60 ms. To benchmark it, I ran a vectorized Python "golden model" on my MacBook Air 2017, which took around 120 ms. It was incredibly satisfying to watch a $25 FPGA beat the laptop CPU!

I really hope this inspires some of you to dust off your Tang Nano boards and give it a try. If you use the Jupyter notebook I included, you can easily retrain the network's weights and biases to use this exact architecture for your own custom classification models. I’m more than happy to help anyone who wants to get it running or has questions about the implementation.

I'll drop the link to the source code in the comments. Attached is a picture of the board running the Python host script alongside the BloodMNIST input image it classified. I'd love to hear your thoughts!

I have implemented a Z8 retro-computer on a Tang Nano 9k, including a primitive PS/2 decoder that translates the PS/2 events to the keyboard matrix typically used in old computers (so no software changes are necessary). It only remembers the held modifier keys (Shift, Ctrl, Alt, ...) and one normal key.

However, my computer seems so slow that I type faster than the computer can handle it (same applies to an emulator from someone else that emulates this computer on a PC).

Do you have a resource friendly idea how to buffer the PS/2 events? Just writing into a buffer and then change the software to pull out the events instead of scanning the matrix? How to deal with buffer overflows without the risk of truncated events (as PS/2 key events have different byte lengths)?

Here are my projects with Tang Nano FPGA and bare metal programming.

When I started I wished I had these projects to start from :)

https://github.com/calint/tang-nano-9k--riscv--cache-psram

https://github.com/calint/tang-nano-20k--riscv--cache-sdram

https://github.com/calint/rust_rv32i_os