u/Realistic_Extent3487

▲ 0 r/EmuDev

Help?

Hi

i am interested in consoles emulation and low level hardware emulation i know every process but do not know where to start

i was working on mips32 recompiler currently i have made decoder and my IR

IR_TYPE type;

IR_OP operation;

uint32_t mips32_instruction;

union

{

// R templates

struct {IRReg RegA,RegB,RegC;}op_r_r_r;

struct {IRReg RegA,RegB; uint8_t sa;}op_r_r_sa;

struct {IRReg RegA,RegB;}op_r_r;

struct {IRReg RegA,RegB;}op_r_hilo;

struct {IRReg RegA,RegB;}op_hilo_r;

// I templates

struct {IRReg RegA,RegB; int16_t immediate;}op_r_r_imm16;

struct {IRReg RegA,RegB; int16_t offset;}op_r_r_off16;

struct {IRReg RegA,RegB; uint16_t u16;}op_r_r_u16;

};

and there is funcs that set the instructions like this

void make_r_r_r (RegID RegA, RegID RegB ,RegID RegC)

{

this->op_r_r_r.RegA.id = RegA;

this->op_r_r_r.RegB.id = RegB;

this->op_r_r_r.RegC.id = RegC;

}

what should i do next i am poorly know x86 instructions while i need it to build the backend if some has already made jit before and experience in recompilers help me to complete it

reddit.com
u/Realistic_Extent3487 — 4 days ago
▲ 9 r/EmuDev

JIT or LLVM

for jit compiler you have to write the whole compiler:
1- decoder

2- IR

2- register allocator

3- optimization like eliminate dead code

4- a whole arch backend like x86 or arm with register allocator and optimization again

for llvm just do this :

1- write decoder then for every instruction see what is the equivalent in llvm ir

llvm has it is own reg alloc + heavy optimization that emit incredibly fast code

reddit.com
u/Realistic_Extent3487 — 5 days ago