
Vaso Sanitário com Caixa Acoplada, monobloco White Pearl
u/Luizinho185
Ta nas coxas pq tem uns 2 anos q eu não modelo mas quebra um galho.
https://www.mediafire.com/file/j4nl7lco7c54aot/monobloco_whitepear.zip/file

u/Luizinho185
Ta nas coxas pq tem uns 2 anos q eu não modelo mas quebra um galho.
https://www.mediafire.com/file/j4nl7lco7c54aot/monobloco_whitepear.zip/file
1 - It's a pin/pad right? For bypass capacitors for a x86 CPU, so let me understand, the etch below it will be covered by the solder mask then there will be a pin/pad above it. Every assumption right? So my question is: what is that cutout on the edges on the etch right in the bypass capacitor corners? What it is its purpose? Another question is, thinking about the fab, how does the pin/pad of the bypass capacitor makes contact with the etch/cooper pour below it?
2 - What is these cutout on the ring(pad) of the via? This is a Xeon socket so i guess it has to do with temp or current?
3 - Why is there a pad/trace, this dog bone, between a pin and a via when they are already in the shape/etch/cooper pour? Isn't the via cooper barrel and ring(pad) and the pin surrounded by the etch/cooper pour/shape?
4 - Why is the VCC and GND trace/pad bigger than the signal trace/pad to the via? If the vias are the same size? I mean, the barrel of the via, the size of it, the ammount of cooper on it be it its walls or its pad's are the same? The VCC/GND i get it, the bigger the better, but the other ones? The one i pointed to is a M_DEF_CPU_RESET_N. Is not even a signal integrity critical one i guess, is just standards?