Feels like everything is “AI-first” now.
But if your whole product is just a wrapper around a model… what happens when models improve, prices change, or someone clones it in a weekend?
Where’s the actual moat?
Meanwhile boring SaaS still makes money. Always has.
My current take:
Build something that works without AI
Then use AI to make it better
Not “AI is the product”
More like “AI is a feature”
Curious how people here view this.
Curious how people handle this. ERC catches unconnected pins and basic schematic errors, DRC catches layout - but neither checks whether the voltage on a net actually exceeds the max rating of the connected component.
For example: a 5V net connected to an MCU with a 3.6V max supply, or a logic signal at 5V going into a 3.3V-only GPIO. Both can pass ERC/DRC completely fine.
Do you have a checklist? A spreadsheet? A review process? Or do you mostly just know your parts well enough to catch it manually?
I built a small CLI tool that scans a KiCad netlist and flags integration mistakes that ERC/DRC don’t catch.
Example: a component rated for 3.3V connected to a 5V rail.
That kind of issue can pass review and only show up after fabrication.
Running on real kicad netlist: rv scan .
Produces:
ERROR RULE_OVERVOLTAGE:
U1 pin 1 on net /+5V is 5.00V (max 3.30V)
exit code: 2
Current checks focus on:
Still early, but working on real KiCad projects.
I’m looking for honest feedback:
Repo: