PSUB_StampErrorMult error in Cadence Virtuoso
Hello, I am a noob at this and have just started design for a VLSI class. I know the efficiency of this layout is not good and is quite spaghetti - i am just going for basic functionality. I am not sure why I am getting a PSUB_stamperrormult error when running DRC. From what I have researched it sounds like the problem is the way I have connected to bulk to its nets on the PMOS transistors? Can I not use integrated bodyties? I assumed from the way they body is routed in the schematic that it should work the way I have design it in layout. Any help appreciated!
(ignore the fact that the pmos and nmos names are switched - just a naming mixup)
Edit: Thank you all for the help! DRC has no errors now :) This was my first design aside from basic tutorials so I appreciate the newbie advice!