r/chipdesign

This is a vent post.

I'm not one to judge someones AI use but when I see almost all reports with em dashes and with the classic "it's not this, it's this" every paragraph, with RTL verification with "SMOKE TEST PASSED" full of fucking rockets and emojis 🚀🚀🚀✅✅ in each stage, I think this has gone a little too far.

People tell me it's "shippable" and works then I test it and would you look at that it doesn't fucking function.

And when I get microsoft teams replies with fucking em dashes it gets even crazier, like what is this. I ask a question to someone and they reply starting with you're absolutely right here's how I'd fix it with paragraph partition and bold starting numerals. Like why would you do this...

It is one to thing to use AI as a productivity enhancer, a second thought, collaborator or to run an agentic flow, it is another thing to outsource your brain to a 20-200 bucks per month AI subscription.

Thank god I'm in analog so I encounter this less, but if you work AMS/DV then god help you.

I didn't have this issue 6 months ago...

Hi guys . I have decided to buy a book in Analog IC design and i am confused about which to pick .

I have read some chapters from CMOS Analog IC Design by Razavi and it's very good as it gives more qualitative and intuitive understanding ,but I haven't read from Jacob Baker book and I heard that is more practical book which I think it will be good for me .

Any suggestions ?

I just want to know what actually is working for everyone who are job hunting (in USA)? So far, I’ve tried direct applications through company portals, reaching out to people on LinkedIn, cold emailing, contacting legit staffing agencies that help with contract and contract-to-hire positions, different job boards, and a few other things.
All these things and I still haven't had much luck. For those of you who are actually getting interviews, what’s working for you?

Throughout this subreddit and across the broader Semiconductor community, I noticed a lack of respect for Validation Engineering with many people claiming that once you start in it, you'll be stuck in it and hard to switch out.

But this is true for any job really where you get too complacent.

I've noticed that validation does have its fair share of perception challenges nowadays since it is mostly considered a cost center; you're at the tail end of the schedule, you generally don't have control over what is handed to you. Automation is also becoming prevalent in validation as well.

However, validation is, in my opinion, one of the best field for young engineers to start in and for people to experience another part of the design flow. You learn a bit about lab equipment and ensuring how data is considered good to hand off to key stakeholders. You engage with designers and other key members of the semi design flow. You also acquire an attitude of not looking down on validation people later in your career.

But nowadays, validation does tend to be very execution heavy and can leave you without a system level understanding of the chip you are testing and how it got there.

I say this because I've spent some time in validation after some time in other areas. Though I grumbled a bit while in it and people often looked down and to the right, I learned quite a bit of perspective I didn't have from other jobs.

Curious to hear your thoughts; do you think validation becoming increasingly perceived as lower on the totem pole?

Hello Guys I am a Recent Engineering Graduate with a Bachelor's in Computer Engineering (Mix of Computer Science and Electronics), I have been studying VLSI for past 1 year while also Job Hunting, In my College we got access to AMD Vivado which I used to learn RTL for Digital Design and Verification, My college didn't had any Analog Courses only Digital, I want to get into both Analog and Digital to build an expertise is Mixed Signals for that I need access to EDA Tools but I am not a Student anymore and still searching for a Job I have tried open source softwares but all the recruiters I have met asks for Cadence or Synopsis, so is there a way to get access to them for someone in my situation?

Can anyone please tell me the pattern of questions asked in the OA and how much time was allotted for each section? Also, if you remember, could you share the exact question that was asked in the OA or any relevant info about the question

I'm an EE graduate from a good engineering university in Asia and currently work as a communications engineer. During undergrad I spent ~2.5 years in a hardware research lab.

Recently I got approached by a government organization that's trying to build a small Fabless IC design team. They apparently have a decent amount of funding and want a project that can show real results fairly quickly. They've tried a few things before, but apparently nothing really worked out.

Here's the funny part: they asked me to come up with project ideas.

I'm interested in IC design, but I'm honestly still pretty junior in the field. I have some relevant research experience, but I've never taped out a chip and have never taken a design through a complete ASIC flow. So I'm honestly not sure how qualified I am to decide what a new team should build.

Some ideas I've been thinking about are an LDPC/DSP accelerator, RISC-V SoC, hardware security IP, ADC/DAC, or some kind of communication accelerator. But I am such a rookie to take on these tasks.

So I'd really like some advice from people who've actually done this:

If you were in my position, what would you do?

Would you try to come up with a relatively simple project and help them get started? Or would you tell them they need experienced IC designers first? I don't think they would accept the latter, because they're so desperate to break into the IC industry.

There's also another possibility I'm considering: asking them to support me in getting proper graduate-level IC design/research experience, and then coming back with that experience to help build the team.

And for those who've done a first tapeout: what would you consider a realistic first project for a small team with funding but very little IC design experience?

I'm looking for honest advice, including if you think this whole situation is unrealistic.

Hi everyone

I’ll be starting my Master’s degree in Electronics Engineering at the University of Genoa (UniGe) in Italy soon, and I’m trying to plan ahead for my master’s thesis and, potentially, future research.

My main interests are:

• Power Management ICs (PMICs)
• DC-DC converters, mostly switched-capacitor, buck/boost/buck-boost, and resonant converters
• Energy harvesting and low-power power conversion
• Analog/mixed-signal IC design related to power management

At first I was mainly looking at professors and research groups within UniGe, but I realized that it might make more sense to look more broadly and not just inside the university I’ll be attending since I haven't been able to identify a professor or research group within UniGe working specifically on PMICs. So I’m hoping to get some advice on research groups, professors, or labs that might be open to working with a master’s student from another university.

A bit about my background:

I recently graduated in Electronics and Telecommunication Engineering. During my undergraduate studies, I was part of an IC design lab and gained some experience with Cadence Virtuoso and the TSMC 180 nm process.

I’ve also studied DC-DC converters independently, including switched-capacitor, buck, boost, and buck-boost converters. On the analog side, I have a foundational background in topics such as:

• single-stage amplifiers
• current mirrors
• frequency response
• basic stability analysis

Most of my background comes from Razavi and Allen & Holberg. I haven’t gone very deeply into topics such as bandgap references, LDOs, or advanced op-amp design yet.

I only have one Q2 journal publication from my undergraduate research on a hybrid resonant switched-capacitor DC-DC converter: https://etasr.com/index.php/ETASR/article/view/10817

The work was entirely simulation-based in Cadence Virtuoso using TSMC 180 nm. Unfortunately, I didn’t have access to the funding/facilities needed for a tape-out, so I haven’t had the opportunity to go through the full ASIC flow from design to tape-out.

Because of that, I’m particularly interested in finding a research environment where I could take the next step and gain more experience with actual IC implementation, or more advanced power-management research.

I’m wondering whether it is possible to do something along the lines of:

UniGe MSc → formal thesis supervisor at UniGe → research/project carried out with an external professor, research group, university, or institute elsewhere in Italy, Europe, the US, or Canada → thesis ultimately submitted through UniGe.

Of course, I understand that this would depend on UniGe’s rules and potentially on agreements between the institutions. I’m mainly trying to find out whether people have actually done something along these lines, what form the arrangement took, and how feasible it is.

So I’d especially appreciate recommendations for:

1. Research groups/labs anywhere in Italy, Europe, the US, or Canada working on PMICs, integrated DC-DC converters, switched-capacitor converters, energy harvesting, low-power ICs, or closely related topics.
2. Professors/researchers who are receptive to MSc students from other universities.
3. Experiences with doing an external/collaborative MSc thesis, where the student is officially enrolled at one university but performs the research with another group.
4. Advice on how students normally arrange this kind of collaboration and how early I should start contacting professors.

I’m also very open to related areas such as analog IC design, low-power circuits, power electronics, mixed-signal ICs, and energy-efficient systems, even if the group doesn’t work specifically on PMICs.

I know I still have a lot to learn, but I’m serious about pursuing in this direction and would love to hear from anyone who has gone through a similar path.

Thanks in advance for any recommendations, experiences, or advice :D

I am working in a networking hardware startup in Bengaluru. I completed around 1 year here. Company itself is a Gen 1 startup and only around 18 months old, so many flows were not properly available when I joined.

In this one year I worked on many things around RTL/design, but I feel I did very less actual RTL design. Some work I did:

Replicating setup from existing blocks to our block.

Creating setup for top-level RAL flow for software and DV.Writing some CSR related RTL/work.

Creating Makefile based flows.Writing some Python scripts to assist DFT work.Running lint, fixing minor lint issues and adding waivers.Integrating some Synopsys IPs, reading their documentation and doing setup.Creating Joules setup, running clock gating reports and trying to improve low clock-gating areas.Running synthesis through Makefiles and trying to understand synthesis reports.

I can read timing reports to some level, but I did not get chance to do actual timing closure/fixes.

Some waveform debug and minor RTL fixes.

Running Formality. I debugged a few minor failing points, but not much deep experience.

For most of these tasks, I also took help from Cursor AI. I am worried because many setup/automation type tasks can become easier with AI, and for Gen 2 project most basic flows will already be present.

Now we are near RTL freeze and I am not getting much work. I feel like I did everything around design except actual design. I have not really written a proper RTL module from scratch based on a spec.

What I really want is to improve microarchitecture skill. Suppose someone gives a spec, I want to know how to think:What registers are needed?Where FIFO is needed?How to handle backpressure, latency, throughput, reset, errors, arbitration etc.I want to build intuition like a real RTL designer, not just run flows or fix small issues.

I thought of writing my own IP and comparing with existing Synopsys IP, but if I start with something big like DMA controller, maybe I will spend forever and still not understand if my architecture is wrong. I am confused what projects to start with and what learning path to follow.

Since next project may take around 2 more months, I want to use this time seriously. My goal is that in next project I can demand ownership of a small block and take responsibility from microarchitecture to signoff.

I also have few career questions:

What kind of work does a junior RTL/design engineer with 1-2 years experience get in companies like Nvidia, Qualcomm, Samsung, Google, Microsoft, Analog Devices, etc?

If I want to switch to such companies, what should I prepare for interviews?

What kind of RTL/microarchitecture/design questions are usually asked for someone with around 1 year experience?

What projects can I do in next 2 months which will actually help me become better?

Any good resources for industry-level RTL and microarchitecture? Most online material feels either college-level or too random.

For India/Bengaluru, what can be expected salary range for 1-year RTL engineer in good product/MNC companies?

I am from a tier 1 college but unfortunately I don’t have seniors/friends whom I can discuss these things with.Any honest advice, roadmap, resources, project ideas, or interview experiences will really help. Thanks.

#vlsi #rtldesign

We have openings for candidates with 2+ years of experience in PnP, functional validation, or PM management roles within the CPU/SoC Server team.
PNW relocation is required.
If you’re genuinely interested and have hands-on SoC/CPU validation and performance experience, ping me and I can share more details.

Unfortunately, our team is finding it challenging to identify the right candidates for these openings.

Hey all,

Me and some friends spent the last few months compiling open source tools into a cloud platform for chip design, sort of GitHub or leet code style, with the goal of designing it to be more accessible to learners than the current EDA tools.

We've also put some learning courses into it to explain the fundamentals of chip design, with the idea being that people will soon be able to add their own courses to a shared community library.

The end goal for the platform is to essentially build a platform that covers the whole learning journey from getting started, all the way to helping someone get a job.

I know this reddit can be pretty brutal so I am sure it will get rinsed, so please bear in mind this is a work in progress. We built it because there are so many people asking how to get into chip design, with very few actual paths beside a masters degree.

The site is at www.vulkos.co.uk, and (I say this nervously) - it would be great to hear what you think.

Hey all.

I am working on some personal project. I wish to design and test a folded cascode amp and use it for an LDO too.

I want to come up with some specifications for my OP Amp.

I want to set a certain gain, slew rate for output and power consumption. How can I decide what values should be a good target spec?

Say I set the gain target to be 60dB (which is modest for a folded cascode amp). Now how do I know whether it is attainable and I am not being limited by the technology itself. There is only so many tuning knobs that I could turn. At what point do I know I have squeezed the maximum performance out of that technology.

Also, how can I come up with reasonable specs for my project circuits (if I don’t have a customer setting the specs for me).

I understand that this is a very open ended question with no definite answer, but any advice from experienced designers would be appreciated!

I am using GPDK045 1v transistors. (If that helps)

I plan to first cover Digital design and computer architecture by David and Sarah Harris, there are video lectures on YT of course of they teach on college (that course covers this book).

I am also open for other options 😁

Can open source asic tools like yosys or openroad help me in the asic domain since ihave no access to industry tools

imean would it matter when applying for jobs what kind of tool i used

Hi everyone,

Sometimes I need to buy used FPGA boards for my project as the new ones are out of my budget. Where can I buy competitive and reliable ones? we often buy from eBay, any others? I checked from google and found the below stores, anybody bought from them before?

https://bmisurplus.com/

https://evelltech.com/

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Hello Everyone

I need a bit of help as I am assigned a semester project of 3 bit Programmable differentials Amplifier in 65 nm for -10 db to +10 db and bw is 350 MHz.

I'll highly appreciate the insights anyone can plz hit me up.

I need the guidance like what should be the architecture or some support material I should go through.

Thank u so much

Looking forward to your super guided thoughts

\#analog chip design

\#pga

\#cmos

\#tsmc