Sooo what are the two Co-opST/Co-opLT postings about? They popped in by themselves today. All my applications are still at 'Received Submission', but do these two imply I'm past the initial automatic screening?
Looks like a first time instructor to me, but has anyone had any classes with them by any chance?
Currently fighting tooth and bone for getting apprroved for an override of this course (I'm originally from engineering department).
I'm being told that I should consider the online version offered, which I really don't like to, considering what I've heard from the quality of online courses and the proof-driven nature of the course.
Regardless, does anyone know how the online version is?
I know at least one person has tried to come up with the similar thing every other week, and I also get why the idea of a “LeetCode for RTL” doesn’t really work (for a lot of reasons).
That said, despite the massive flood of Ai-generated hdl practice websites, there have been some genuinely good executions, HDLBits, Chipdev, and more recently logi-code’s PPA-focused scoring system (although the problem set was heavily shared with chipdev from what I found). The frustrating part is that even the decent ones get abandoned early, or stop at surface level, despite having solid foundations.
At the same time, I don’t think RTL practice for the sake of interview preparation is something you need a platform for. You can get very far just by picking FPGA/ASIC IPs and building them from scratch. That, topped with the few websites I mentioned before is probably more than enough, and building is still the highest-signal way to learn.
But I also can’t ignore that there is something appealing about a shared platform to scroll for interesting problems to solve in my spare time without starting an entire new project; not just for interview-style problems, but as a place to explore different design approaches. From my own experience, RTL design can vary wildly depending on context (FPGA vs ASIC, timing vs area vs power priorities, etc.), and the tradeoffs matter way more than the “correct answer.” Being able to see how others approach the same problem, and why, feels way more valuable than just solving it alone.
What I’d personally want out of something like this isn’t anything flashy or over-engineered. More like:
I think that’s also why something like the Advent of FPGA was interesting — not because of the problems themselves, but because they encouraged meaningful hardware design thinking.
So I’m not trying to propose “let’s build a platform in a week and solve everything.” I’m more curious about whether there’s a way to build something small but sustainable, where experienced people would actually want to contribute over time. I’d take a much smaller set of problems written by people who actually care over a large, polished but shallow platform.
So I’m curious, especially from people longer in the industry:
