u/Faangdevmanager

The hype for the AES+ (releasing Nov 12) is significant, specifically regarding the "no emulation" claim. As a software engineer, I’ve been looking into the hardware implementation and wanted to get the community's take on the architecture.
Based on current technical disclosures, here is the breakdown of what is actually under the hood:

1. The HDL-to-ASIC Pipeline
The system is confirmed to use ASICs (Application-Specific Integrated Circuits) rather than an FPGA. However, the logic running on those ASICs is licensed from Jotego and Furrtek, the primary developers behind the Neo Geo MiSTer FPGA cores (source).
Essentially, Plaion is taking the Hardware Description Language (HDL) code used in FPGA implementations and synthesizing it into hard-wired silicon.

2. The "Static Core" Problem
Unlike a MiSTer or a traditional FPGA console (like the Analogue Pocket), the AES+ logic is permanent.
• No Updates: If a bug is discovered in the timing or a specific game's edge case after the chips are fabricated, it cannot be patched via firmware. The logic is physically etched into the ASIC.
• Frozen in Time: The performance will be identical to the state of the MiSTer core at the moment the design was finalized for manufacturing.

3. The Engineering Upside: Native 5V Logic
The standout feature here is the physical I/O. Original Neo Geo hardware and cartridges run on 5V logic.
• Modern FPGAs typically operate at 3.3V or lower, requiring level shifters to talk to original cartridges, which can introduce complexities.
• By using a custom ASIC, the AES+ can run natively at 5V, ensuring 1:1 electrical compatibility with original 90s mask ROM cartridges without signal translation (source).

4. Summary: Premium Shell vs. Flexible Logic
We are looking at a device that offers the best possible physical integration (15-pin ports, native 5V slot, high-end DAC) but utilizes a "frozen" version of the reverse-engineered logic we already use on MiSTer.

My Question to the Community:
Does the convenience of a "plug-and-play" ASIC console with native cartridge support outweigh the fact that the core logic is essentially a non-upgradable snapshot of an FPGA core? Is the €199.99 price point justified by the 1:1 physical recreation, or does the lack of logic flexibility give you pause?

I'm curious if anyone has more insight into the specific DAC being used or if there’s information on whether the BIOS will be customizable. Let's discuss.