u/Gur_Technical

Moved the chip antenna to the board edge on the new rev of my ESP32-S3 watch board. Receive got way better (RSSI -49 vs -78 to -86 on the old board, same AP, same desk). Transmit got worse.

Swept esp_wifi_set_max_tx_power() on both:

TX power	Old board	New board
2–5 dBm	AUTH_EXPIRE	joins, barely any data
8–14 dBm	AUTH_EXPIRE	AUTH_EXPIRE
17–20 dBm	joins	chip resets

The reset is an interrupt WDT inside systimer_hal_get_counter_value, and the systimer runs off the 40 MHz crystal. So I think the crystal clock stalls when it transmits hard.

Main suspect is in the picture: I routed bottom-layer tracks under the crystal on the new board, so ground under X1 went from 43% to 3%, right next to an antenna that now actually radiates.

Has anyone seen an S3 pull its own crystal like this? And is grounded copper tape over X1 a fair test without a VNA?

(Full disclosure, it's my own watch project I am planning on selling. It's in certification, updates/pre-order here: https://www.ewanwills.co.uk/r/reddit-esp32/ewatch · firmware: https://github.com/Ewan-Wills/EWatch_Dev)

Sharing a debugging lesson and asking for layout critique on the board.

I had what looked like dead displays across four different PCBs and one which worked.

I was very confused because I had 5 identical screens and 5 identical boards assembled by JLC. All of the screens worked on one PCB but you’d assume all the OCBs were the same.
The one board that “worked” had actually had its FPC joint loosened from me opening/reseating the screen a hundred times, while the fresh boards needed the connector tab properly opened and seated before the display + touch would talk.
I only figured it out after writing a loopback/connection check across the reset and I2C lines instead of trusting a plain I2C scan. Plain I2C scan only properly checked the connection on reset so by making a proper loop using the displays reset I could poll it faster.

Two things i learnt:
1. Breakout pads on everything. Two early revisions had none, so when they didn’t boot I couldn’t bodge-wire to test a thing and learned almost nothing from an expensive spin. Never again.
2. Trust nothing and no one

Board is ~34×28mm, 2-layer, ENIG, ESP32-S3. Image attached. would genuinely value a critique of the layout, especially around the antenna and the FPC. It’s part of a smartwatch project I’ve been working on.