u/Luq1308

Hello r/electronics,

In this post, I want to share my project that I’ve been working on in the past few months. It’s a custom-built lab bench power supply. Such a project is common in the DIY community, so what makes this one different? The custom-designed SMPS board that I engineered from scratch isn’t your typical “let’s put this power supply module into a case” approach. So let’s dive into the working principles, design decisions, and in-depth test results.

The Forwarder 1kW is the SMPS board that I designed and used in this project. It’s based on a hard-switch, half bridge topology. The full features of this power supply are as follow:

• 1000W maximum continuous output capacity.
• Configurable from 50V/20A up to 400V/2.5A.
• CC/CV mode with mode signal and indicator.
• Tuneable operating frequency and dead-time.
• Dedicated power stage enable pin.
• Analog reference interface for output voltage/current control.
• Analog signal output interface for monitoring voltage/current.
• Dedicated fan port with optional automatic power-on.
• Simple construction, less than 130 components on board.
• Easy to build with mostly THT components.
• Curated component selection for high accessibility.

The working principle of this design is about as simple as it can get for a switched-mode power supply. I talked about the working principle of my design over on r/AskElectronics, so I’m not going to repeat it here. Most of the concepts stay the same, just with some design adjustments and the numbers changed.

https://www.reddit.com/r/AskElectronics/comments/1s8ll9g/

Now, I want to go in detail about the design decisions that led into this design that you may find interesting.

1. The lack of active PFC (Power Factor Correction) was determined after I reviewed many existing designs and products in the same power level and after noticing many of them get away without one, I decided to omit this feature. For my first SMPS design, I want to focus solely on the DC to DC conversion power stage. For my next iteration, I’m more likely to resort to a simple boost PFC to achieve tighter regulation.
2. Double-ended hard-switch topology (half-bridge in particular) was chosen due to its suitability and simplicity in this application. Flyback is out of the question due to power requirement, single-ended topologies have poorer core utilisation and the high favour for current mode control, and resonant topologies don’t seem like a good choice for my first SMPS design (duh).
3. An SG3525 with LM324 was chosen to generate the PWM signal and achieve regulation. SG3525 is quite popular for double-ended converters with plenty of documentation online, while the LM324 provides CC+CV regulation with two of its op-amps (because SG3525 only features one error amplifier). This effectively forms a setup based on voltage mode control.
4. Voltage mode control was inherently chosen as the result of using SG3525 and it was favoured due to its “arguably” simpler implementation over current mode control. However, I find the better regulation and inherent cycle-by-cycle overcurrent protection offered in current mode control very enticing. I probably would resort to this approach for my next iteration.
5. My galvanic isolation strategy was to have the entire control circuit on the secondary side and have the PWM signal driven to the primary through a gate drive transformer. This way, I can have simpler and more precise control over the voltage and current regulation without the nonlinearity issues of using optocouplers.
6. ETD49 cores were used for both transformer and output inductor. I like the round bobbin that makes winding easier, and the calculations prove it’s suitable for power of 1kW at 64kHz. The gapped version was used for the output inductor because the high inductance requirement requires high turn number, and that gets complicated real quick with toroidal cores.

After I finished the board, I wanted to know how my design performs in real-life. So, I conducted a few tests that are relevant for a power supply. The testing rig was pretty simple:

1. A power meter at the input and four DS18B20 were used to track the energy consumption and component thermal profile over time.
2. An electrolysis tank with electrodes that can be spaced accordingly was used to simulate multiple load profiles at power up to 1kW.
3. A third positive electrode connected through a toggle switch was used to abruptly step the load in the dynamic tests.
4. Hantek DSO2D10 was used to capture the waveforms in various tests.

The test conducted, along with their results are as follow:

1. The stress test was conducted for one hour and each component temperatures peaked at the following temperatures: half-bridge N-MOS 75°C / 167°F, main transformer 55°C / 131°F, output rectifier 69°C / 156°F, output inductor 44°C / 111°F.
2. The efficiency characterisation was conducted at 50V and 1, 2, 5, 10, and 20 amps. 89% efficiency was achieved at 5A load or more. Maximum recorded efficiency was 90.3% at 50V 10A load, and efficiency at maximum load was 89.1%.
3. The output ripple test was done with direct on-trace probing with a ground spring, 20M BW limit, 1x probe, and no added capacitor. No load ripple showed at 40mVpp, 1A load at 34mVpp, and maxes out at 94mVpp at full load.
4. The turn-on curve tests showed that under loaded condition, it’s bound to the SG3525 soft start function and takes a second to reach the full 50V. At no load and lower setpoints, the voltage overshoots by a few volts.
5. The load step tests showed about 3% voltage deviation going from no load to 10A and vice-versa. Going from 5A to 10A and vice-versa showed no sign of voltage deviation.
6. CV to CC transition took 3ms to begin responding and a full 7ms until the voltage settled. CC to CV transition began immediately and took 3ms to settle. 50V CV to 10A dead-short showed 10App oscillation at 2.2kHz.
7. The input bulk capacitor showed 24Vpp ripple and the DC blocking capacitor showed 14.2Vpp ripple. The primary side of the transformer showed about 75% overshoot that settled within 2 cycles.
8. The N-MOS at conduction showed 184nS fall time for Vds and 572nS rise time for Vgs. At disconduction, the Vds rise time showed as 56nS and 556nS for Vgs fall time.

I’m here not to glaze over my design. After reviewing the results and doing a retrospective, here are my critical opinions about this design.

What I like about this design:

• Good efficiency figure (89.1% at full-load)
• Excellent ripple even without a second-stage filtration (94mVpp at full load)
• Good power density for an almost-fully THT build.

What I don’t like about this design:

• The overcurrent protection is too slow, though it somehow works at preventing the half-bridge from exploding on the dead-short test.
• The compensator design fails in certain conditions (DCM/CCM transitions, output dead short), which results in output oscillation.
• The output diodes are hard to access or replace.

The full schematic, gerber files, KiCAD save files, spreadsheet calculation, and full-res images are available on my Github repository: https://github.com/Luq1308/Forwarder1kW

The build process and the in-depth testing are available in my YouTube video: https://youtu.be/MGMqqtXgwRg

That’s all I have about this project. I hope this post is informative and can be used as a reference or for benchmarking purposes, in which I had difficulty in researching previously. If you have any unanswered questions, let me know and I’ll try to answer them. Thank you for reading, and I'll see you next time.

WTS Xiaomi 13T

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Varian 12/256 Alpine Blue dengan leather back.

Fisik dent wajar, layar baret halus tapi tidak ada kaca yang retak.

Baterai terakhir cek ada di 1000 kecil cycles, dapat 3700mAh, SOT sekitar 3 jam.

Layar dan jeroan original, belum pernah bongkar.

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Unit only, gratis headset dbE Kumo GS1X Pro.

Jual dua ini karena udah ganti ke 17T yang dapet headphone juga.

Prefer COD daerah Cimanggis, atau sepanjang KRL.

Terima kasih.

Gw iseng cari post r/indotech tentang workbench dan ternyata belum ada dong. Padahal kalau di subreddit luar lumayan sering orang sharing workbench/workshop mereka. So, here we go.

Workbench gw kurang-lebih seperti ini kalau lagi rapih. Gw biasa ngerjain hobi FPV, mechanical, electrical, dan content creator tipis-tipis di sini. Di lack biru nyetok part resistor E12, komponen pasif random, part mekanik, dan lainnya. Tools ada solder biasa dan uap, 3D printer delta, power supply lab, 5 unit variac 3kVA, dan instrumen-instrumen pengukur lainnya. Baru-baru ini nambah oscilloscope dan LCR meter buat masuk ke hobi baru (power electronics). Meja besi di depan buat perakitan, meja kayu di kanan buat debugging dan programming. Demikian penjelasan singkat workbench gw, kalau ada pertanyaan, monggo.

Reposted from r/AskElectronics because I think the revised design fits better in this subreddit.

This is my 1kW half-bridge SMPS design. My goal is to create a cost effective, simple, and robust SMPS board for lab bench power supply builds. The full details on this project is available in my previous post over on r/AskElectronics and this design implements the improvements people have suggested for my design. The improvements include:

1. Major layout changes that actually make sense for a longitudinal cooling ( u/machineintel, u/BmanGorilla, u/BVirtual, u/mariushm).
2. The new layout now significantly shortens the secondary power path, can handle higher current, and doesn’t require a wire jumper.
3. Improved board density and 8% reduction in form-factor.
4. 2x 225 DC blocking capacitors to better handle the high current demand.
5. Multi-pin config for the capacitors to improve adaptability with various capacitor leg types/spacing.
6. Refined component selection and better on-board documentation silkscreen.
7. Re-routed high dv/dt loop on different layers and coupled with ground plane to minimise EMI radiation ( u/VEC7OR).
8. Added electrically-connected mechanical mounting (M3 screws) to the heatsinks for better mechanical support and to reduce EMI radiation ( u/machineintel).
9. Added a film capacitor across VBUS close to the N-MOS half-bridge to decouple the high dv/dt loop from the electrolytics ( u/machineintel).
10. Implemented a single snubber across the low side switch for simplicity and increased its maximum thermal dissipation to 6W ( u/machineintel).
11. Added a GND return terminal on the main transformer for the faraday shield that reduces HF noise capacitively coupled to the secondary side ( u/machineintel).
12. Added another M3 mechanical mounting for the board close to the ETD49 cores and the heatsinks for better mechanical support ( u/Keefe1933).
13. Maxed out the spec for the 1210 X7R MLCCs ( u/flyingsaxophone).

The full resolution media is available here.

This project is to be open-sourced once I finalise the design and ensure everything works properly. I plan to make a few YouTube videos about it and I welcome any PCB sponsorship for this project, feel free to DM me.

If you have any questions about this design, let me know and I'll try to answer them. Thank you and have a good day.