u/Outrageous_Insect532

Hi r/hpc,

I'm a 2026 CS grad with experience in Systems, ML Systems, HPC and adjacent fields. I'm struggling to get a job right out of college in this field and will be grateful if anyone can provide any guidance on how to proceed further into my career or any sort of referral.

About my experience:

• Built Umbra, an API-level CUDA profiler that intercepts GPU kernel dispatch via LD_PRELOAD on libcuda.so/libcudart.so, requiring no source code modification. Discovered that torch.compile dispatches through cuGetExportTable, an undocumented NVIDIA internal API invisible to standard profilers.
• Built Mako, an OpenMP scheduling daemon for HPC workloads, dynamically optimizing thread-to-core affinities and CPU frequency scaling at runtime on Intel Haswell/Xeon NUMA systems. Achieved 8% speedup and 21% energy reduction on ECP benchmarks with ~2% overhead.
• Built RVNE, a RISC-V Neuromorphic Extension ISA implemented in Verilog, modeling spiking neural network operations at the RTL level.
• Research internship at TCS Research building a CUDA device simulator (stubbing ~70 CUDA runtime/driver APIs to run PyTorch/Triton workloads on CPU without modification).

Resume: https://drive.google.com/file/d/1hfBnvL5Wef6lr4ecjc7kkoKk9qADKQ__/view?usp=sharing

Any guidance, feedback, or referrals would be genuinely appreciated. I'm eligible to work both in the USA and India without any visa sponsors. Thanks for reading.

Hi r/hpc,

I'm a 2026 CS grad with experience in Systems, ML Systems, HPC and adjacent fields. I'm struggling to get a job right out of college in this field and will be grateful if anyone can provide any guidance on how to proceed further into my career or any sort of referral.

About my experience:

• Built Umbra, an API-level CUDA profiler that intercepts GPU kernel dispatch via LD_PRELOAD on libcuda.so/libcudart.so, requiring no source code modification. Discovered that torch.compile dispatches through cuGetExportTable, an undocumented NVIDIA internal API invisible to standard profilers.
• Built Mako, an OpenMP scheduling daemon for HPC workloads, dynamically optimizing thread-to-core affinities and CPU frequency scaling at runtime on Intel Haswell/Xeon NUMA systems. Achieved 8% speedup and 21% energy reduction on ECP benchmarks with ~2% overhead.
• Built RVNE, a RISC-V Neuromorphic Extension ISA implemented in Verilog, modeling spiking neural network operations at the RTL level.
• Research internship at TCS Research building a CUDA device simulator (stubbing ~70 CUDA runtime/driver APIs to run PyTorch/Triton workloads on CPU without modification).

Resume: https://drive.google.com/file/d/1hfBnvL5Wef6lr4ecjc7kkoKk9qADKQ__/view?usp=sharing

Any guidance, feedback, or referrals would be genuinely appreciated. I'm eligible to work both in the USA and India without any visa sponsors. Thanks for reading.

Hi r/iisc,

I'll be joining IISc next month as a RA for 3-6 months. I was wondering whether RAs get access to gym, or will I have to look outside campus for gym?