I have managed with the help of gemini to setup the fpga terminal toolchains on gentoo linux for my hdl toolchain iverilog and my tang nano 9k and I just flashed my sr latch onto the tang nano 9k and I got some indicator leds on it which you can see above and below is my fpga flashing success.
Not much to say I will just use this to flash my existing iverilog hdl projects and write new ones to synthetise to this board.
Around 2 weeks ago I began learning iverilog my first hdl to do digital logic fundamentals which im currently doing after finishing learning the fundamentals of c one to 2 months ago and doing classical electronic engineering on breadboard, physical components, wires and schematics since I was 9. As a kid I always dreamt of how people can make electronic circuits, components and devices with millions to billions of transistors and logic gates I then realised now it's via rtl hdl which I am currently learning the fundamentals of. My question is once I have a fundamentals portfolio to potential processing unit whether my own manually down cpu core without ai or dsp to show to employers to get entry level fpga engineer roles. Btw my learning routine is at late nights but since I have started it has always been consistent and my current habits and routine make it impossible to change it. I live in perth where fpga engineer roles including entry level ones I will target soon is very niche, elitist and rare. I am wondering from you experience employees, engineers and people in the industry to what advice could you give me in this situation. I am 18 and I am trying to get my first job the engineering side is solid and the progression is consistent.
