u/acidoglutammico

Trying to write a very small kernel in rust by roughly following phil-opp tutorial but with the most up to date packages and features. So instead of using pic i chose to use x2apic.

this is my kernel main:

fn kernel_main(boot_info: &'static mut BootInfo) -> ! {
    kernel::init(boot_info);

    x86_64::instructions::interrupts::int3();

    serial_println!("Done");
    kernel::hlt_loop()
}

kernel::init is:

pub fn init(boot_info: &'static mut BootInfo) {
    vga_buffer::init_vga(
        boot_info.framebuffer.as_mut().expect("Framebuffer not available")
    );
    gdt::init();
    interrupts::init_idt();
    apic::init_apic();

    x86_64::instructions::interrupts::enable();
}

apic contains:

use x86::apic::ApicControl;

pub static IA32_APIC_BASE: u32 = 0x1B;
pub static IA32_APIC_BASE_MSR_ENABLE: u64 = 0x800;
pub static IA32_X2APIC_EOI: u32 = 0x80b;

pub fn init_apic() {
    disable_pic();

    let mut apic = x86::apic::x2apic::X2APIC::new();
    apic.attach();

    unsafe {
        x86::irq::enable();
    }
    crate::serial_println!("finished setting up apic");
}

fn disable_pic() {
    const PIC_1_OFFSET: u8 = 32;
    const PIC_2_OFFSET: u8 = PIC_1_OFFSET + 8;

    unsafe {
        let mut pic = crate::pic::ChainedPics::new(PIC_1_OFFSET, PIC_2_OFFSET);
        pic.initialize_disable();
    };
}

pic holds the structure for the chained pics and the initialize_disable function is:

pub unsafe fn initialize_disable(&mut self) {
    let mut wait_port: Port<u8> = Port::new(0x80);
    let mut wait = || unsafe { wait_port.write(0) };

    macro_rules! write_port {
        ($pic_n:expr, data, $w:expr) => {
            unsafe { self.pics[$pic_n].data.write($w); }
            wait();
        };
        ($pic_n:expr, command, $w:expr) => {
            unsafe { self.pics[$pic_n].command.write($w); }
            wait();
        };
    }

    let saved_masks = unsafe { self.read_masks() };

    write_port!(0, command, CMD_INIT);
    write_port!(1, command, CMD_INIT);

    write_port!(0, data, self.pics[0].offset);
    write_port!(1, data, self.pics[1].offset);

    write_port!(0, data, 4);
    write_port!(1, data, 2);

    write_port!(0, data, MODE_8086);
    write_port!(1, data, MODE_8086);

    write_port!(0, data, 0xFF);
    write_port!(1, data, 0xFF);

    unsafe { self.write_masks(saved_masks[0], saved_masks[1]) }
}

the interrupt descriptor table is properly initialized:

static IDT: Lazy<InterruptDescriptorTable> =
    Lazy::new(
    || {
        let mut idt = InterruptDescriptorTable::new();
        idt.breakpoint.set_handler_fn(breakpoint_handler);
        unsafe {
            idt.double_fault
                .set_handler_fn(double_fault_handler)
                .set_stack_index(gdt::DOUBLE_FAULT_IST_INDEX);
        }
        idt[Into::<u8>::into(InterruptIndex::Timer)]
            .set_handler_fn(timer_interrupt_handler);
        idt
    });

and the interrupt for the breakpoint is:

extern "x86-interrupt" fn breakpoint_handler(
    stack_frame: InterruptStackFrame,
) {
    crate::serial_println!("EXCEPTION: BREAKPOINT\n{:#?}", stack_frame);
    println!("EXCEPTION: BREAKPOINT\n{:#?}", stack_frame);

    unsafe {
        x86_64::registers::model_specific::Msr::new(crate::apic::IA32_X2APIC_EOI)
            .write(0);
    }
}

And yet when it hits the interrupt i get on the serial:

finished setting up apic
EXCEPTION: BREAKPOINT
InterruptStackFrame {
    instruction_pointer: VirtAddr(
        0x1000000bb61,
    ),
    code_segment: SegmentSelector {
        index: 1,
        rpl: Ring0,
    },
    cpu_flags: RFlags(
        INTERRUPT_FLAG | 0x2,
    ),
    stack_pointer: VirtAddr(
        0x18000014f98,
    ),
    stack_segment: SegmentSelector {
        index: 2,
        rpl: Ring0,
    },
}
panicked at kernel/src/interrupts.rs:62:5:
EXCEPTION: DOUBLE FAULT
InterruptStackFrame {
    instruction_pointer: VirtAddr(
        0x1000000d06a,
    ),
    code_segment: SegmentSelector {
        index: 1,
        rpl: Ring0,
    },
    cpu_flags: RFlags(
        0x2,
    ),
    stack_pointer: VirtAddr(
        0x18000014f68,
    ),
    stack_segment: SegmentSelector {
        index: 2,
        rpl: Ring0,
    },
}

I dont get why i get a double fault. if the int3 instruction is removed it doesnt crash of course.

Am i creating the interrupts wrong? i have "-cpu qemu64,+x2apic" as qemu arguments so x2apic is supported (checked even with raw_cpuid). Is the double fault because its not resetting the interrupts properly?

Since i have only 1 cpu for now i was expecting for interrupts to get routed to the only cpu. Also where can i read how to properly set up keyboard interrupts with x2apic?