Explorer Board Update 2
I have been bringing the Explorer Board up a little more the last few days. The focus of this was to create the System Controller Software.
This is now working with and controlling the PMIC, providing the smart VIO required for the SYGYZY interfaces. It will select the lowest common voltage and set the appropriate PMIC output to the voltage and enable power to the connected SYGYZY pod now. If there is no common voltage or it is above the max 1v8 supported by the FPGA IO then the system will not power the pods for safety.
The system controller also connects into the system monitor (if instantiated) in the FPGA design and reports the junction temp of the FPGA and its voltages. It will also report the system controller temperature also.
So far only a couple of minor things, but we will need to do a short run again to make sure the design is clean and get the board colour correct, before we push for the 3000 production units. these will be at the $99 promised, but future batches might be a little higher.