r/computerarchitecture

Compressed DDR Storage with Cache Decompression

 I've been thinking about a question concerning program execution efficiency lately and would like to hear your views.

We know the concept of information entropy, but the instructions and data actually executed by a computer are not necessarily high‑entropy (many instructions exhibit repetitive patterns, and data shows locality), which implies that there is theoretical room for compression.
Given that the "memory wall" problem is becoming increasingly prominent, and DDR bandwidth is often the bottleneck,
if we exploit the hierarchical nature of the cache and store programs in a compressed form in DDR, while decompressing them back to actual runnable instructions/data in the cache, could this effectively improve the effective bandwidth utilization for instructions and dat

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u/Awkward-Principle533 — 5 days ago
▲ 1 r/computerarchitecture+3 crossposts

Horosvec: a pure-Go ANN vector index (SQLite + mmap fp16), stress-tested on 26.7M real embeddings

Horosvec is an embedded approximate-nearest-neighbor index in pure Go — no CGO, single dependency (modernc.org/sqlite). Vamana graph + RaBitQ binary quantization + exact rerank; the index persists as a SQLite file, and at scale the raw vectors live in an fp16 mmap "arena" outside the Go heap: 26.7M vectors (all of Hacker News) served at p50 7.8 ms with ~14 GB of heap.

Two things this crowd might find interesting beyond the engine itself:

  1. The concurrency result. Under 32 closed-loop clients on a real 512-dim corpus, the pure-Go engine sustains ~1.9x the throughput of hnswlib (C++ through a cgo binding) at equal-or-better recall:
  • ef 64: 39,599 QPS vs 20,501 (recall 0.947 vs 0.914)
  • ef 128: 22,638 vs 11,525 (recall 0.977 vs 0.961)
  • ef 512: 6,582 vs 3,423 (recall 0.994 vs 0.989)

Single-client, hnswlib still wins ~2x. On 128-dim SIFT at iso-recall it wins ~5x (1-bit codes are information-starved in low dimension). All numbers, including the ones we lose, are published as raw JSONL.

  1. The GC lesson. Our benchmark initially showed a throughput cliff (5.7x collapse past a beam-width threshold) and dead concurrency scaling. perf on the query window: 41% gcBgMarkWorker/gcDrain, 22% bgsweep, 21.6% database/sql.withLock. Root cause: the harness was silently running the non-production code path where each rerank candidate is a row-by-row SQL blob read — an allocation storm whose GC cost grows with the live heap (that's why the cliff moved with corpus size) behind a process-wide pool lock (that's why client scaling died). The production path — mmap arena, zero SQL in the hot loop, per-query state from a sync.Pool — has neither problem: the cliff flattened and 32-client throughput multiplied by 56. Lesson: a bench harness that picks its configuration through a silent env var lies by default; the measured mode now belongs in the output record.

Build side: memory-bounded streaming build from the arena, parallel Vamana construction with sharded neighborhood mutexes, and an import path that consumes an externally-built graph (GPU cuVS/CAGRA builds the 26.7M graph in 17 minutes, re-encoded into horosvec in 22).

Repo: https://github.com/hazyhaar/horosvec (v0.7.0, MIT). Benchmark write-up with the full story: https://github.com/hazyhaar/horosvec/blob/main/docs/BENCHMARK-2026-07.md — including an honest section on why we're deliberately not on ann-benchmarks.

u/hazyhaar — 9 days ago
▲ 5 r/computerarchitecture+1 crossposts

What is the precise definition of an exception?

According to COAD by p&h: exceptions are events other than jumps and branches that changes the normal flow of instruction execution.

According to CS:APP - an exception is a transfer of control to the OS kernel in response to some event.

Now suppose a division by zero happens. by p&h the event of division by zero is the exception and the transfer of control that follows is the response to that exception, i.e., handling of the exception.

But according to CS:APP the division by zero is not the exception. rather the transfer of control is the exception

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u/Plane_Dream_1059 — 12 days ago

How would one start designing an gpu

There isn’t much info about gpus online and that has made my search a bit difficult. It is easy to design a cpu since it has a defined isa set and it tells what to store where but what about gpu.. since it handles many cores and is memory hungry,the specifics of what is needed to design a gpu is a bit blurry. (Or is the specification specified somewhere)

Is there any tips you would give to me while I’m doing gpu designing

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u/yummmmi7 — 14 days ago