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▲ 28 r/computerarchitecture+3 crossposts

A good book suggestion for computer networks, Computer Architechture and operating systems

I'm a CSE-AI student and an aspiring Systems & AI engineer.

I'm looking for books that build a strong foundation in:

  • Computer Networks
  • Computer Architecture
  • Operating Systems

I prefer books that start with the fundamentals but also go into enough depth to prepare me for systems programming, distributed systems, and interviews. I'm willing to read challenging books if they're worth the effort.

What books would you recommend, and in what order should I read them?

Any recommendations, opinions, or advice beyond books would also be appreciated.

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u/That_Singularity — 15 hours ago
▲ 1 r/computerarchitecture

Are virtual memory addresses compiled in and if no can they?

Hi,

I have a project and don't want virt mem, first of all is it compiled in and secondly if yes how does one force it to be without

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u/Yha_Boiii — 1 day ago
▲ 25 r/computerarchitecture+4 crossposts

A Multi-Dimensional, Per-Pass Empirical Study of the LLVM Optimization Pipeline

Hi Folks!

I simply want to share this empirical study on the LLVM -O3 pipeline on the PolyBench suite.
I don't want to bore you with too many details that are already in the paper.
Any feedback is welcome :D

Blog post: https://federicobruzzone.github.io/posts/a-multi-dimensional-per-pass-empirical-study-of-the-llvm-optimization-pipeline.html
arXiv: https://arxiv.org/pdf/2606.31238

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u/FedericoBruzzone — 4 days ago
▲ 9 r/computerarchitecture+5 crossposts

What's the most underrated GPU ever released?

Some GPUs become legends overnight, while others quietly deliver incredible performance and value but never get the recognition they deserve.
Maybe they were overshadowed by a flagship launch, released at the wrong time, or dismissed because of their brand. Years later, some of these cards turn out to be amazing

u/bucckymeniso — 10 days ago
▲ 7 r/computerarchitecture+3 crossposts

Open-source chiplet architecture that bypasses 3nm dead-end (x128/x512 adaptive vector registers)

The problem: Semiconductor industry is stuck at 3nm/2nm — quantum leakage, heat, insane costs.

The proposed solution: Instead of shrinking transistors, widen the data path.

· x64: 4–8 cycles for 256-bit data block · x128: 2 cycles (2 lanes × 64-bit) · x512: 1 cycle (4 lanes × 128-bit)

Implementation:

· Chiplet-based (UCIe open interconnect) · Adaptive bus (64/128/512-bit dynamic switching) · JIT translator for x86/x64 software compatibility

License: CC0 — completely free for anyone (Intel, AMD, ARM, startups, you).

Full concept: https://github.com/kaibaleksey33-cell/-

I'm not selling anything. Just putting this idea into the public domain. If you're an engineer — take it, simulate it, build it.

u/AmbassadorDear2158 — 12 days ago