Hi everyone,

I'm a student working on a DIY digital storage oscilloscope as a project, and I've reached the point where I'd really like an experienced engineer to review the analog front end before I move toward PCB design.

The ADC I'm using is an AD9200 (10-bit, 20 MSPS), and my current target is roughly 5 MHz useful analog bandwidth.

The attached schematic is my current AFE.

Signal chain

Input → selectable attenuator → protection → buffer → bipolar-to-unipolar conversion → 4th-order LPF → ADC-side protection → AD9200

1. Attenuator

I have four selectable ranges:

1×
5×
10×
25×

The maximum external input I intend to apply is approximately ±25 V.

I'm using SPDT switching so that only the selected attenuation network is connected to the signal path, preventing the other networks from loading the active path.

I've simulated the frequency response of each attenuation range separately and they appear reasonable over the intended bandwidth.

2. First protection stage

After the attenuation network I have a 220 Ω series resistor and Schottky clamps to the ±5 V analog rails.

The idea is that the attenuation network provides most of the current limiting because of its relatively high resistance, while this stage provides additional protection for the input buffer.

3. Input buffer

I'm using an OPA1652 as a unity-gain buffer.

The purpose is mainly to prevent the attenuator from being loaded by the following circuitry.

4. Bipolar → unipolar conversion

The attenuated/buffered signal is bipolar, but I need a unipolar signal for the ADC.

I'm using a unity-gain offset stage with a +1 V reference, giving approximately:

−1 V → 0 V
0 V → 1 V
+1 V → 2 V

So the waveform amplitude isn't intentionally changed; it is shifted upward.

5. Anti-aliasing filter

I decided on two cascaded 2nd-order active low-pass sections, rather than going to a more complicated 6th-order filter.

My priority is to keep the response reasonably flat through approximately 5 MHz, while still getting some attenuation of higher-frequency content before the 20 MSPS ADC.

The current simulated response is roughly −0.36 dB at 5 MHz.

I realize this is a compromise between passband flatness and anti-alias rejection, and I'd especially like opinions on whether this is sensible.

6. ADC-side protection

This is the part I'm least confident about.

I'm planning a second protection stage immediately before the AD9200 so that faults downstream of the first protection stage cannot reach the ADC directly.

The main concern is the AD9200 AIN absolute minimum of −0.3 V. I'm trying to design the negative clamp so that the ADC never gets close to that limit, rather than relying on the ADC's internal protection.

I'm considering low-forward-voltage Schottky clamps and a series resistor before AIN.

What I'd really like reviewed

I'd appreciate criticism of the design, especially:

Is the attenuator/protection architecture reasonable?
Is the bipolar-to-unipolar conversion approach sensible for the AD9200?
Is the 4th-order filter reasonable for a ~5 MHz / 20 MSPS oscilloscope, or am I compromising too much?
How would you implement the final ADC protection, particularly the −0.3 V limit?
Are there any obvious PCB/layout issues or stability problems I'm overlooking?
Is there anything here that looks fundamentally wrong before I commit it to hardware?

I'm deliberately posting the actual current schematic rather than a cleaned-up conceptual block diagram, so please feel free to point out anything ugly or questionable.

Thanks in advance. I'm much more interested in finding problems now than discovering them after fabricating the PCB.

I recently bought this Tektronix 466, and after only a few minutes of using it I suddenly lost the horizontal but still get some signs of life when moving Xpos and a vertical line when a signal is applied. But other than that it’s just a dot(I have been careful to keep intensely at its lowest and spend the minimum time with the dot in one position to avoid burning a hole)

I immediately checked the voltage rails, and since then I've been checking capacitors and probing transistors, mainly around the sweep generator and reset circuits. I can see some activity from the sweep generator, but I haven't been able to work out where the fault is.

This is my first time attempting to repair a solid-state oscilloscope (I've previously worked on several valve/tube-based scopes), so I'm finding this one quite a bit more difficult to troubleshoot. I'm starting to run out of ideas and would really appreciate any advice on where I should be looking next.

I've attached a video showing the scope in use.

If anyone has experience with the 466, or can suggest some specific tests or points I should check, I'd be very grateful

r/oscilloscope

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Review my 20 MSPS / 5 MHz oscilloscope analog front end (AD9200) — looking for design flaws