u/HoneyMoney92

▲ 9 r/FPGA+1 crossposts

Is it normal for negative setup slack to improve after PnR?

After synthesis, my negative setup slack was 0 ns. However, after place-and-route (PnR), the negative setup slack increased to around 0.4 ns.

Is it normal for the timing results after PnR to differ this much from the synthesis results?

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u/HoneyMoney92 — 11 days ago