Doubt
First of all how can we have 2 way interleaved if our data bus is only 16 bit and how can i get two 16 bit word in one go please please explain me this concept in comment please
second doubt : The question does not require this concept any way but it say s in go overflow site
Total number of block access =(512/4+100×1028/4+512/4)=25956=(512/4+100×1028/4+512/4)=25956
All the blocks above and below the loop region can be assumed to be cache misses.
It is given that the cache is fully associative but the replacement policy is not mentioned. Let's assume it is FIFO.FIFO. Also, for simplicity let's assume that there's no reuse within a cache block.
In the first loop access every cache access will be a miss. Since the loop body size is 10281028 and we assumed FIFO,FIFO, the last cache block will replace the first one. In the second iteration, first cache block access will be a miss and this will replace the second cache block. Going like this every cache block access will be a miss.
(i) So, hit ratio =0.=0.
but i can just replace the last block making only one miss i.e recently accessed line in cache memory making only one miss per acess to make my hit ratio very good