u/Queasy_Dentist3903 — reddlx

furry verity with their gaster concrete thighs

Made a CPU!

I made another post about this, but all it had was my unreadable code. Since then, I have made some blog posts with my unreadable code along with some semi-readable commentary!

https://brew.is-not-a.dev/posts/OoO-cpu/

https://brew.is-not-a.dev/posts/OoO-cpu-2/

reddit.com

u/Queasy_Dentist3903 — 3 months ago

▲ 144 r/FPGA

I made an out-of-order CPU

https://reddit.com/link/1uc4vok/video/uka6ta672q8h1/player

This was the biggest project I have worked on. It features basic branch prediction, an LSQ, speculative execution, out-of-order issue, superscalarness (dual fetch, tri-issue, dual retire), and implements the base RISC-V 32-bit ISA (only usermode instructions, with MMIO supported for UART). This is my first ever hardware-related project, so please don't flame my code too hard ;)
https://github.com/0x62797465/cpu-final/tree/main

reddit.com

u/Queasy_Dentist3903 — 4 months ago

▲ 13 r/teenagersbutcode+2 crossposts

I made an out-of-order superscaler CPU with branch prediction and an LSQ

buzzword buzzword buzzword I made a CPU in systemverilog. It's working simulation wise, there's still a few things I have to do before it's "done," but as of now it can run factorization programs, use the stack, load a program into memory via UART, run basic programs compiled with gcc, etc. It *should* be able to run on real hardware (an FPGA) but I have to complete MMIO before I do that.
https://github.com/0x62797465/cpu-final

u/Queasy_Dentist3903 — 2 months ago

▲ 5 r/teenagersbutcode

Mixed boolean arithmetic engine

https://github.com/0x62797465/small-mba

Basically makes simple stuff very complicated. It's used for obfuscation and such. The math behind it is fascinating. If you'd like to learn, please look at my code (or use Google, since my code is as readable as Russian cursive).

u/Queasy_Dentist3903 — 4 months ago