Does anyone know what this is? Any time I try to route these pads that gray shape blocks me. The top gives me an error that says "the routing start point violates DRC". I've run DRC and excluded any errors relating to this component (which is a mid-mount USB connector). I have no idea why, but A5 and B5 worked okay. I've tried different width traces as well and that didn't help.
I'm sure this is probably just a geometry question or maybe FreeCAD has a way to do this but I am at a loss. I've been at this for 2-3 hours at least and can't figure how to do this. I've even tried brute forcing incremental measurements and could never get it.
My project has a perimeter gasket trough where the top face sits at z=0.I have a raised section with 45* slopes on each side. I managed to add the tough at the top (simple) but cannot figure out how to get the downslope of the trough to land on the bottom of the trough for the face.
Each trough is 1mm deep. I've added two images. the one on the left has the sloped trough "done" and highlighted in blue where at the bottom you can see there is a little speed bump here.
The second part of the picture is just a slice where you you see the slope trough is deeper than the face trough because they aren't meeting exactly.
I am creating the trough via a pocket if that matters.
As we all know Opus 4.7 can be a bit slow even in shorter discussions. Previously I’d just put whatever I was asking in, hit enter and either sit there bored waiting or go back to whatever task I was doing (sometimes even figuring it out before Claude comes back).
Recently I started reading the thinking output while I am waiting. Do you guys ever do that? It’s hilarious reading how it thinks about the problem provides a response. Half of the ones I read are massive and halfway through it’ll be like waiting I am confusing myself let me start over.
Or it’ll realize half way through whatever it was doing that it was wrong and has to start over.
Anyway if you don’t read those comments you should just for laughs or insight into how it works.
I’m sure this is obvious to most people so you don’t need to tell me. It’s just something I never cared to read before.
I have a PCB that I designed and now I am making a case for it. Well of course I wasn't thinking about the USB port when I did the PCB and now that the PCB is done and I'm most of the way though the bottom half of the case and the USB port is like 0.5mm away from the wall. So there no chance it will work as is (it needs to be IP rated so I can't whack a giant hole in the side).
Is there any better way to "bend" the wall inward 2-3mm or am I just stuck with deleting the entire wall section i have highlighted and then redoing it 2-3mm in then blending the walls in?
I've never used addressable LEDs and need a little help making sure this setup is correct as it seems a bit complex. I'm use to common cathode/anode or the six pin ones, but these are a first for me. I had to move to these due to size. I needed a 5050 size but with extra traces I couldn't anything.
A couple of notes:
- I don't have 5V on my board. Only the output from the LiPo battery and 3V3. I'm bringing in VBAT for the power which is right off my battery power which you can see the JST connector at the top of the screen
- I'm sure the schematic is a little messy, I can clean that up at some point. Mainly just want to make sure it looks correct and then the layout I did looks okay
- The three traces off to the top are just going to the ESP32 pins so I didn't include them
- For this I used a mix of google, datasheets, and AI for questions
Disclaimer: I'm not not an EE, just a lowly Physics guy. I've read schematics for work (was a lab tech for many years) and then repairing cars for most of my life, but this is my first foray into designing one myself.
Let's see if this works. Took some advice and redid this area. I'm leaving the original, but below is the updated version.
This isn’t exactly an is this AI photo, but a lot of people need to read this. I see constant comments where people are zooming way into the backgrounds and seeing garbled text and immediately claiming AI. This isn’t always the case, at least with iPhones. I’ve attached two pics. Same exact subject. One is zoomed in the other isn’t. Yes they are on different tables but I took both pics.
If you see the first image the text is nice and clear. No issues. Then the second picture a good portion of the text looks like it could be AI. But it’s not.
So keep this in mind next time you zoom in on text. That automatically doesn’t mean it’s AI if you see unreadable text.
Edit: just to be clear since I might not have been initially. I didn’t take a pic then send it through an AI to upscale. These are directly from my phone with no editing. My phone did the AI upscaling on its own. I’m guessing trying to fill in the gaps it couldn’t see.
