▲ 2 r/NPTEL

Winter Internship willingness form - NOC format

I got a mail from NPTEL to fill the Google Form for willingness for the winter internship and I am eligible to apply. But in the google form there is a mandatory field which asks for "Please confirmed that you have informed my Head of the Institute/Department, or SPOC of NPTEL Local Chapter of my Institute to apply for the NPTEL Winter internship 2026. Kindly upload the duly signed consent letter here".

Now the problem is they didn't provide me any consent letter or NOC form to get signed from my college and I cannot find any on their official website. Am I supposed to make a generic form and get it signed by my HOD but most probably he will decline to sign it due to a lack of official authenticity. Please help me out guys ;(

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u/Practical_Bend_7599 — 4 days ago

High speed PCB design review

It's a high-speed (10Gbps) Cat6a RJ45 (Ethernet) passive coupler PCB design. I have calculated differential pair line width and minimum track distance for 100-ohm impedance and routed them with equal length constraints.

The inner two layers are connected to Ground, and the top and bottom layers are used for signal routing. The thickness of the layers and dielectric is as per the JLCPCB standard for 4-layer PCB. The Ethernet chassis ground is connected to the PCB ground through R1 and C1 for ESD protection.

Please review and help me with any possible errors and any improvements, as it's my first ever 4-layer PCB design.

u/Practical_Bend_7599 — 1 month ago
▲ 13 r/PCB

High speed PCB design review

It's a high-speed (10Gbps) Cat6a RJ45 (Ethernet) passive coupler PCB design. I have calculated differential pair line width and minimum track distance for 100-ohm impedance and routed them with equal length constraints.

The inner two layers are connected to Ground, and the top and bottom layers are used for signal routing. The thickness of the layers and dielectric is as per the JLCPCB standard for 4-layer PCB. The Ethernet chassis ground is connected to the PCB ground through R1 and C1 for ESD protection.

Please review and help me with any possible errors and any improvements, as it's my first ever 4-layer PCB design.

u/Practical_Bend_7599 — 1 month ago

I am doing a part time robotics engineering internship in which I was designing PCBs, doing R&D and coming up with different ideas and concepts for making robotic STEM kits for children. I liked this work that' s why I begin working here.

But in the work description, it was specified to sometimes go and teach School students regarding the STEM kits which I don't like at all and teaching is not my forte. So today they invited me to teach in a school and I hate that part of work but I can't say no becuase they stated it in the work description and at interview I said that I can try but I don't like it.

They also pay me almost negligible so I am mostly doing this for learning purpose and I am interested in the R&D work. It's not even a month since I joined, so I am confused should I quit or continue?

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u/Practical_Bend_7599 — 4 months ago
▲ 6 r/NPTEL

Today, as on 25th April, I got the result for my NPTEL course in Embedded System Design using ARM (96%, Gold Elite+ and under top 1%) under Prof. Indranil Sengupta & Prof. Kamalika Dutta in IIT KGP.

I read that NPTEL will mail me regarding internship if the course professor wants to get some intern. So will I get the summer internship or winter internship? (My course is from Jan to Mar - 8 weeks). I also don't know that whether internship is offered or not for this particular course.

Also I want to know the experience if anyone has worked as an intern under Prof. Indranil Sengupta or Prof. Kamalika Dutta.

And my college semester schedule is very odd, like my summer vacation starts from June to August and winter vacation starts from January. So can i get the internship in this odd period of time?

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u/Practical_Bend_7599 — 4 months ago