u/THE_HEXAGONE

From left to right: A, B, C, D.

Hello everyone! It's me again with another weird request.

My first PCB design is progressing well, I'm super proud of myself.

Yes, I design my pcb just like my schematic Hahahah, but dw: I'll stitch them up on the final pass and reoptimized the layouts.

However I went back to the USB-C block and still can't decide on the "best" version of this block.

Please read this:

• My Requirements are : 5-15v, up to 3A. POWER ONLY
• It's a 6 pin USB C with CC1/CC2 for negotiating PD with a TPS25730D
• Fuse is included along TVS 2200 underneat, Caps and ESD762.
• The ultimate goal is to reuse that block accross many simple projects.

The only difference between these designs is the layout placement.

My question is simple: What is the best one?

I'd personnally go for C/D (mirrors) then A then B.

Thank you <3

This is what these two would look like if they swapped their colors.

Pretty amazing no?

Hello everyone!

I'm back for more questions 💙

I am currently designing a pcb with the TPS25730D as PD controller: https://www.ti.com/lit/ds/symlink/tps25730.pdf
Evm board: https://www.ti.com/lit/ug/slvucp4a/slvucp4a.pdf

NOTE: The board will also supply 12-15v at 1-3a over a 5m cable.

I am a bit struggling on sizing my components:

• All my resistors are 0402 (0603/0805 for hand tuning).
• My capactiors are sized for Nominal capacitance in mind

in this block, I have 1x10uF(1206) and 2x22uF(1210) (all 35v).
When looking at the 3d view (ignore the misplacements), i was suprised by how big those caps are compared to the evaluation module board (all 0402).

Since the Ti recommendation is 47uf nominal (min 10uf, max 100uf). Am I exagerrating with my 54uF caps?

I tried to take into consideration the DC bias Derating, but for a 47uf Nominal that would give me something close to 100uF total capacitance and I believe that it's overkill.

Note that the EVM just use about 3x10uF with very small package (0603) which gives probably a bias of -50 to -70%, which is huge!

Can you please help me understand how to size capactitors? My goal is to understand how to apply recommendation without ending with a powerbank on my circuit.

Thank you all

Hello Everyone!

I am designing my first PCB and I've been scratching my head trying to figure out the "best" bare minimum USB-C layout.

I am surprised that no one has curated a nice library of ready-to-use blocks (for hobby, production, PD, HV, etc.).

What I'd like is to define a very simple yet predictable layout that I can reuse without worrying across many projects.

I do have a production-oriented design in mind. In this case, the block should always satisfy:

• 2/4-layer board
• 6 pins for power only, USB-C rated for 3A PD
• CC1/CC2 lines ESD protected (completed further with PD controller/SMD)
• VBus protected (TVS + 2x 10nF caps + a fuse later)

You'll see two different layouts attached. One is following the TPS25730D EVM board (last pic), while the other lays everything on top.

I know that they're not perfect (spacing isn't good, etc.)... I'm just starting.

But I wanted to ask these questions:

• Where do you find reliable PCB designs, or do you just make your own library?
• What do you think is the best production/EMI layout to start with?

Thank you very much!

To every Seer abuser