I just finished four days of DDR5 tuning, and I wanted to share the entire experience, including the failed attempts, the surprisingly good results from my Gigastone memory kit, and something I'm still trying to understand: how to properly tune memory termination impedance when running four high-capacity DDR5 DIMMs on AM5.

I'm particularly interested in hearing from people running 4×32GB, 4×48GB, or other large dual-rank configurations.

1. Why 128GB?

My previous setup was 2×16GB Corsair Vengeance RGB DDR5-6000 CL28 — a very fast kit that I had no reason to complain about.

However, I run local LLMs using Strata, experimenting with large MoE models and CPU/GPU memory offloading. For these workloads, 32GB was becoming a serious limitation.

So I decided to prioritize capacity over raw memory frequency.

I purchased a factory-matched Gigastone GAME PRO 4×32GB DDR5-5600 kit, with Micron memory ICs and dual-rank DIMMs.

I specifically wanted a proper four-stick kit, rather than combining two separate 2×32GB kits.

My system:

Component	Specification
CPU	AMD Ryzen 5 7500F
Motherboard	ASUS TUF GAMING X670E-PLUS WIFI
Memory	Gigastone GAME PRO 4×32GB, 128GB, dual-rank Micron
Kit model	GS-D5-U5600-32GBX4-Topwind-HB-B
BIOS tested	3881, 4004, 3883
Final BIOS	3883
GPU	RTX 4070 SUPER 12GB
OS	Windows 11
CPU tuning	5050MHz all-core, approximately 1.20V

With four dual-rank DIMMs installed, this is a 2-DIMM-per-channel (2DPC), eight-rank configuration — a much heavier load on the memory controller than a typical two-stick setup.

I knew running the kit at its advertised 5600 MT/s would be ambitious. What I didn't know was how much I'd learn about memory training along the way.

2. Day one: 128GB detected, but only DDR5-3600

On Thursday, October 8, I installed all four sticks.

The good news: all 128GB was detected immediately.

The less exciting news: the initial memory speed was DDR5-3600.

Enabling EXPO wasn't a magic solution. I repeatedly encountered the yellow DRAM diagnostic LED, sometimes sitting there for several minutes without completing POST.

I started working upward manually, mostly with EXPO disabled.

My frequency experiments went roughly like this:

Frequency	What happened
3600	Initial working configuration
4400	Successfully booted
4600	Eventually trained and became the main tuning target
4800	Sometimes booted, but training and startup were inconsistent
5000	Could not establish a reliable configuration

One thing that surprised me was that memory training wasn't always consistent. A configuration could get stuck on the yellow DRAM LED, but occasionally boot successfully after a complete shutdown and restart.

That made it difficult to distinguish a genuinely bad configuration from an unsuccessful training attempt.

I also experimented with BIOS versions 3881, 4004, and 3883. The final working configuration was achieved on 3883, although I changed several settings between versions, so I can't claim that BIOS version alone made the difference.

3. The most interesting part: impedance and memory termination

This is the subject I'd really like to discuss with the community.

When you populate all four DDR5 slots with dual-rank modules, you're not just asking the memory controller to handle more capacity.

You're also changing the electrical loading of the memory bus.

There are multiple termination and drive-strength parameters involved, including:

• ProcODT — processor-side on-die termination.
• RTT_NOM_RD / RTT_NOM_WR — DRAM-side termination settings.
• RTT_WR — DRAM write termination.
• RTT_PARK / RTT_PARK_DQS — termination associated with parked ranks and DQS signals.
• CAD_BUS / drive strengths — another part of the signal-integrity equation.

What I find fascinating is that these parameters interact with each other. A setting that works for two DIMMs may not make sense with four dual-rank DIMMs.

And there's no obvious universal impedance value you can simply copy.

Here is what happened on my system.

At DDR5-4600, the motherboard's Auto setting for ProcODT read back as approximately 60Ω in ZenTimings.

I experimented with manually setting 53.3Ω.

The system failed to complete memory training and remained stuck on the yellow DRAM LED.

After reverting ProcODT to Auto, I was able to continue making progress.

Of course, a failed training attempt doesn't prove that 53.3Ω is universally wrong, or even that this value could never work on my system with other termination combinations.

But it raised a much bigger question for me:

How do experienced memory overclockers actually determine the right termination values for high-capacity 2DPC configurations?

Do you start with the BIOS-trained Auto values and adjust one parameter at a time? Do you first optimize ProcODT, then RTT settings, and finally CAD_BUS drive strengths? Or do these need to be tuned together as a matched set?

One of my ZenTimings readouts showed approximately:

Parameter	Auto readback
ProcODT	60Ω
RTT_NOM_WR	80Ω
RTT_NOM_RD	80Ω
RTT_WR	120Ω
RTT_PARK	120Ω
RTT_PARK_DQS	80Ω

These are observations from my system, not recommended values for everyone. I kept the termination-related settings on Auto for my final configuration, and the values above should not be treated as a fully verified manual preset.

My practical approach became:

1. Find a frequency that can boot without aggressively changing termination settings.
2. Read the trained Auto values using tools such as ZenTimings.
3. Save a known-working BIOS profile before experimenting.
4. Change one variable at a time and keep a record of successful and failed training.
5. Validate actual memory stability, rather than assuming a successful POST means the impedance is correct.
6. Check repeatability, because a configuration that boots once may not train reliably again.

I'd really appreciate advice on whether this is the right approach, especially for a fully populated AM5 motherboard.

4. Why I settled on 4600 instead of chasing 4800+

I did manage to boot DDR5-4800 during earlier experiments, including a configuration using 44-44-44-88 at around 1.20V DRAM voltage.

But subsequent attempts were inconsistent. Some failed training, and others produced startup problems. At one point I even encountered Windows boot errors.

I eventually decided that a dependable 4600 configuration with tighter timings would be more useful than a higher frequency that only occasionally worked.

Once 4600 was working, I started tightening the primary timings:

DDR5-4600

44-44-44-88
    ↓
42-42-42-84
    ↓
40-40-40-80
    ↓
38-38-38-76
    ↓
36-38-38-76
    ↓
36-36-36-72

I also attempted 34-36-36-72, but that failed memory training.

What impressed me was how far this Micron-based Gigastone kit could go at a relatively modest voltage.

Interestingly, tighter timings didn't improve every individual AIDA64 run. For example, CL38 sometimes produced worse latency than CL40. Benchmark variation, training differences, and other timing interactions clearly matter.

Eventually, 36-36-36-72 produced my best observed latency result.

5. Final configuration and benchmarks

My final tested configuration is:

Parameter	Value
Memory	128GB, 4×32GB dual-rank
Frequency	DDR5-4600 (about 4592 MT/s measured)
Primary timings	36-36-36-72
Command rate	1T
DRAM VDD / VDDQ	Around 1.20V
CPU VDDIO / MC	1.15V BIOS setting
SoC	Auto, approximately 0.99V measured
ProcODT	Auto, approximately 60Ω
RTT / drive strengths	Auto
tRFC1 / tRFC2	780 / 780
tREFI	56000
MCLK / UCLK	Approximately 2300 / 2300MHz (1:1)
FCLK	2000MHz BIOS target; approximately 1970MHz observed

AIDA64 Cache & Memory Benchmark:

Metric	Result
Read	62,248 MB/s
Write	68,991 MB/s
Copy	61,366 MB/s
Best observed latency	76.1ns

The bandwidth values are from a representative complete benchmark run; 76.1ns was the lowest latency observed in a subsequent measurement.

For context, an earlier DDR5-4400 configuration recorded 55,929 MB/s read and 87.6ns latency.

These were not perfectly controlled A/B tests, especially because BIOS versions and other parameters changed during the experiments, but the overall progress was encouraging.

6. Stability testing

I didn't want to stop at a successful AIDA64 screenshot.

On October 11, I completed two separate OCCT Memory tests using the final 36-36-36-72 configuration:

Test	Memory tested	Duration	Result
OCCT Memory #1	96,672MB	1 hour	0 errors
OCCT Memory #2	98,304MB	1 hour	0 errors

Both runs used 12 threads, and I confirmed the active timing profile for both tests.

That's two hours of OCCT Memory testing with no detected errors. Earlier, I also tested looser timing configurations successfully.

I consider this a promising daily-use candidate, although I still want to verify repeated cold boots and potentially run longer memory stress tests. Passing OCCT doesn't guarantee that every future memory-training attempt will succeed.

7. A word about Gigastone

I think Gigastone deserves some credit here.

Before buying this kit, I wasn't particularly familiar with Gigastone as a brand for enthusiast memory overclocking. A lot of DDR5 discussions focus on G.Skill, Corsair, Kingston, or specific Hynix ICs.

This was a complete factory-matched four-stick Micron-based kit, and my goal was capacity rather than chasing benchmark records.

After four days of testing, I'm genuinely impressed.

Getting 128GB running at DDR5-4600 36-36-36-72 at roughly 1.20V DRAM voltage, on a Ryzen 5 7500F, was better than I initially expected.

It doesn't mean every Gigastone kit will behave this way, and I obviously can't separate the memory kit's contribution from the CPU's memory controller, motherboard, and BIOS.

But based on my experience, I wouldn't dismiss Gigastone simply because it isn't one of the brands most frequently discussed in overclocking communities.

For someone who needs a lot of RAM for local AI, development, virtualization, or other memory-heavy workloads, this has been a very positive experience.

8. Questions for the community

This is the part I'm most interested in learning more about.

1. How do you systematically find the right ProcODT and RTT values for 4×32GB or 4×48GB DDR5? Is there a practical method beyond experimenting with BIOS options and recording successful training?

2. Should I leave my current Auto-trained 60Ω ProcODT alone, or could coordinated tuning of RTT_NOM, RTT_WR, RTT_PARK, and CAD_BUS help me reach 4800 or higher? I'd especially appreciate real examples of successful and failed impedance combinations.

3. How much of the four-DIMM frequency limitation is typically the CPU IMC, and how much can be improved through termination, motherboard routing, BIOS training, or voltages?

4. Has anyone else overclocked Gigastone Micron DDR5, especially a factory-matched 128GB kit? I'd be interested in comparing IC revisions, training behavior, and timings.

5. For anyone running 128GB or 192GB on AM5, what frequency, timings, voltage, ProcODT, and RTT combination actually works for you — including cold boots?

I'd love to see ZenTimings screenshots and BIOS configurations from people who have experimented with similar setups.

I'm not presenting this as an ultimate overclocking guide. It's a record of four days of experimentation, including things that worked and things that definitely didn't.

Hopefully someone building a large-memory AM5 workstation will find it useful — and hopefully I can learn a bit more about impedance tuning from the comments.

Thanks for reading!

Hey everyone,

I’m a bit confused with my 5070 Ti tuning in mVolt+ and would love some opinions.

Card: RTX 5070 Ti (VBIOS 98.03.58.00.7d)

Power limit locked at 300 W.

First setup (simple offset):

• Core +350
• XBAR +250
• Memory +1500
• No curve editing

Results in Steel Nomad:

• Score ~7470
• Most of the run: 0.995–1.000 V and 3045–3082 MHz
• Only a very short peak at the very end: 3227 MHz @ 1.045 V

Second setup (aggressive curve):

• Core offset 0 or small (+250)
• Flattened at 1050 mV → 3180–3187 MHz

Results:

• Score noticeably lower (7220–7290)
• Voltage stayed 0.99–1.02 V
• Sustained clocks only 2940–3015 MHz

So with the plain +350 offset I get higher average clocks, better score, and almost the same (or even lower) average voltage. The 1.07 V only appears as a 1-second spike at the end.

I was under the impression that proper V/F curve editing is always superior, but in my case the simple offset is winning hard.

Is this normal on some 5070 Ti samples?

Should I just stick with the +350 offset, or is there a better way to force the card to use the higher points on the curve without raising the power limit?

Also, I don't quite understand how critical a voltage of 1.070-1.075 is if it appears literally for just a second, like a spike. Should I leave the current settings and limit the maximum voltage to 1.050?

Any insights appreciated. Thanks!

Hi everyone,

Like many of you in the AM5 community, I was repeatedly told that running 4 sticks of DDR5 at high speeds with tight timings on a 4-dimm board was an unstable mess, or that it would force a degraded 1:2 mode with horrible latency.

However, with the new Zen 5 Architecture (Ryzen 9 9900X) and the ASRock X870 Steel Legend WiFi, I managed to fully stabilize a 4-stick channel setup at 6000MHz CL30-36-36-76 CR1 running at a pure 1:1 FCLK/UCLK ratio.

I know these screenshots were taken back in February 2026, but I wanted to wait and put this system through a true, long-term daily-use test before sharing. After over half a year of heavy 3A gaming, editing, and daily torture, I can confidently report that this 4-stick setup has shown ZERO signs of silicon degradation, zero crashes, and remains rock-solid stable

To prove this isn't just an "AIDA64 benchmark-stable" setup, I ran the brutal TestMem5 (TM5) with the Extreme@anta777 configuration. It successfully completed 7 full cycles over 6 hours and 13 minutes with ABSOLUTELY ZERO ERRORS (See attached logs).

TestMem5 @ anta777 stress test passed

Interestingly, when I first enabled EXPO, it actually failed training. But after a few power cycles, the X870 board's auto-training and memory context algorithms successfully adjusted the hidden impedance parameters and ironed everything out perfectly.

Here is the exact blueprint and BIOS configuration of how this was achieved to help anyone trying to max out their RAM capacity on X870:

📊 System Specs & Test Results:

• CPU: AMD Ryzen 9 9900X (-20Mv PBO 85°C)
• Motherboard: ASRock X870 Steel Legend WiFi (BIOS Version: 4.03)
• RAM: 65,536 MB (4x16GB Config) @ 6000MHz CL30
• AIDA64 Results: Read: 80,177 MB/s | Write: 85,802 MB/s | Latency: 70.2 ns (Amazing for 4 sticks 1:1)
• 3DMark Time Spy: Overall Score 26,497 (Better than 95% of all results)
• Time Spy Extreme Stress Test: Passed with 98.0% stability

AIDA64 RAM test

🛠️ My Exact BIOS Settings (See Attached Screenshots for Sub-timings):

If you are trying to clone this on your X870 board, do NOT just blindly leave things on Auto. You need to manually tune the voltages and crucial sub-timings to combat the 2DPC signal noise:

• FCLK / UCLK Ratio: FCLK manually set to 2000 MHz, UCLK DIV1 Mode forced to UCLK=MEMCLK (1:1).
• SoC Voltage: Fixed Mode at 1.280V (Safely under the 1.30V AM5 ceiling to stabilize the IMC).
• DRAM VDD / VDDQ / VDDIO: 1.400V (Gives the Hynix dies enough muscle to lock CL30).
• VDDP / VDD Misc: 1.150V / 1.100V

Key Primary Sub-Timings tuned for stability:

• tCL-tRCD-tRP-tRAS: 30-36-36-76 CR1
• tRC: 112
• tWR: 90
• tREFI: Maxed out at 65535 (Massive help for AIDA64 latency)
• tRFC1 / tRFC2 / tRFCSb: 500 / 400 / 300

I know the golden rule of DDR5 has always been "only use 2 sticks", but it looks like with the maturity of Zen 5's IMC and X870 motherboard topology, the 4-stick 1:1 dream is finally fully viable and rock-solid for daily 3A gaming

Feel free to ask me anything about my sub-timings or setup. Let's get those slots filled! And also try at your own risk

RAM timing settings

CPU voltage & RAM settings

Time Spy Score 26497

Time Spy Extreme stress test passed

3D Marks full specs detail

AMD 9900x -20Mv

El resto de mi equipo es: i7 11700f, 32 de ram, placa b560m pro e y fuente evga 600w