u/Lisaismyfav

Screenshot from private SemiAnalysis report:

AVGO TPU Downward Revision
We are seeing lower TPU output in 2H26 than previous expectations. 2026 CoWos output for TPU v7x (Ironwood) is reduced by ~32k, reducing 2026 unit production by ~500k from 3.2mn to 2.7mn. TPU v8i (Sunfish) is also reduced by 5k wafers, reducing 2026 unit production by -80k. Ironwood upstream output now peaks in 2026 with a slight decline in run-rate in 2H, versus our prior forecast of a continued ramp from 2Q26 onwards. We believe this reduction is supply related and due to challenges ramping CoWoS-S. This brings total Broadcom 2026 CoWos output to 215k wafers from 250k previously.

For 2027, we also see lower TPU output than our previous expectation of 6mn units of TPU 7 and TPUi. This is driven by greater allocation towards other customers, with total Broadcom CoWos at ~460k wafers. Most notably there are 55k wafers (which is equivalent to 830k units TPU 8i Sunfish) allocated to MTIA 400 Iris in 2027. However, this remains in flux as Meta is known for abandoning orders, as we saw in May, where Meta agreed to cut its own Broadcom production allocation to support greater TPU supply for Google in exchange for access to TPU compute.
This could play out again and, if Meta abandons its allocation, this could be taken up by TPU. We also see slightly more allocation for OAI Jalapeno's ASIC. We will provide a more detailed model update soon.

AMD TPU Involvement
Market chatter suggests Google is working with AMD on a TPU project in the v10 generation. AMD's involvement would be the first real involvement in a custom Al ASIC project, despite having a custom silicon team. AMD has strong IP especially in advanced packaging and SolC. Additionally, CPU IP could also be a draw given Google and its customers are pushing for TPUS with on-packade CPU cores for RI workloads.