

Where to get started modeling this?
Im a noob at this and I don’t know where to start with modeling this. Can anyone help?


Im a noob at this and I don’t know where to start with modeling this. Can anyone help?
I have no clue why it happens. I'm running it on arch linux. I just want a ddr3l and mipi d phy ip core :(
Hey everyone,
I'm working on a project involving the 3DS top display and I'm trying to get a clearer picture of the exact communication format/protocol it uses.
I think it’s using LVDS (or possibly MIPI DSI, though I'm leaning towards LVDS), running with 2 data lanes and 1 clock lane.
The clock seems to run at 67MHz when sitting in the Luma3DS menu.
I’ve attached some pictures from my oscilloscope probing one of the data lanes.
Does anyone have deeper technical documentation, datasheets, or personal experience reverse-engineering the 3DS display protocol? I'm specifically looking for details on the exact packet/data format it uses to talk to the screen.
Any insight, links, or advice would be greatly appreciated!
I am searching for a pcie based wifi chip for my handheld device and I was going to use the ax210.d2wg but I cant find a datasheet or pinout anywhere. It uses 1216 m.2 but I also cant find a pinout or symbol for that.
I am designing a capacitive touchpad for a handheld device and I am wondering what design I should use for the electrodes. I found 2 designs online so far
I'm wondering what would be the best design for a small touchpad that is about 30x30mm.
Why are there gaps in the BGA balls? Wouldn't it be easier to have it be all one continuous grid?
Its a simple custom LoRa dev device with an e-paper display from https://www.buydisplay.com/serial-2-9-inch-e-paper-screen-128x296-for-electronic-shelf-label-lcd