u/kelvintang98

Hey boys, looking for some brutal honesty from the hardcore crowd. Trying to see if there is any more juice left to squeeze out of this AM5 4-DIMM daily gaming rig, or if I'm already hitting the physical limit of the memory controller.

Specs & Voltages:

• CPU: Ryzen 9 9900X (Dual-CCD)
• Mobo: ASRock X870 Steel Legend WiFi (BIOS 4.03)
• RAM: 4x16GB TeamGroup 6000Mhz CL30 Hynix M-die (4.D)
• VSOC: 1.280V fixed (Trying to keep the IMC alive long-term)
• VDD/VDDQ: 1.400V

The Catch:
These aren't a matched 4-stick kit. They are two completely separate retail kits manufactured 16 weeks apart (Week 3 and Week 19) with totally mixed wafer IDs and chaotic serials.

Current Timings (6000 MT/s 1:1 UCLK/MCLK, CR1):
Currently sitting at 6000 CL30-36-36-76 1:1 with FCLK locked at 2000. It already passed 6+ hours of TestMem5 Anta777 errorless, and has been a rock-solid daily runner for months with zero degradation.

My Question to the Experts:
Considering the massive capacitive and inductive load of this mixed 4-DIMM 2DPC setup, can I safely tighten tRFC, tREFI, tWR, or tRDRD/tWRWR subtimings further at 1.28V VSOC? Or should I leave it alone before the signal integrity collapses?

https://preview.redd.it/1rvr0bfn6ith1.png?width=390&format=png&auto=webp&s=5f2ab0166c87ffe833890ce14bc0328df7007512

https://preview.redd.it/ouwwyywq6ith1.png?width=467&format=png&auto=webp&s=446489ef898698a29209d612a665b63575978f31

https://preview.redd.it/gaizra4v6ith1.png?width=1101&format=png&auto=webp&s=ec2a1844b869fe6618dfe7cbd14e336cdc1eb61e

https://preview.redd.it/wkiwyotw6ith1.png?width=1089&format=png&auto=webp&s=7d59232e7362037084a20f7c81526b46f86e8c1a

Hi everyone,

Like many of you in the AM5 community, I was repeatedly told that running 4 sticks of DDR5 at high speeds with tight timings on a 4-dimm board was an unstable mess, or that it would force a degraded 1:2 mode with horrible latency.

However, with the new Zen 5 Architecture (Ryzen 9 9900X) and the ASRock X870 Steel Legend WiFi, I managed to fully stabilize a 4-stick channel setup at 6000MHz CL30-36-36-76 CR1 running at a pure 1:1 FCLK/UCLK ratio.

I know these screenshots were taken back in February 2026, but I wanted to wait and put this system through a true, long-term daily-use test before sharing. After over half a year of heavy 3A gaming, editing, and daily torture, I can confidently report that this 4-stick setup has shown ZERO signs of silicon degradation, zero crashes, and remains rock-solid stable

To prove this isn't just an "AIDA64 benchmark-stable" setup, I ran the brutal TestMem5 (TM5) with the Extreme@anta777 configuration. It successfully completed 7 full cycles over 6 hours and 13 minutes with ABSOLUTELY ZERO ERRORS (See attached logs).

TestMem5 @ anta777 stress test passed

Interestingly, when I first enabled EXPO, it actually failed training. But after a few power cycles, the X870 board's auto-training and memory context algorithms successfully adjusted the hidden impedance parameters and ironed everything out perfectly.

Here is the exact blueprint and BIOS configuration of how this was achieved to help anyone trying to max out their RAM capacity on X870:

📊 System Specs & Test Results:

• CPU: AMD Ryzen 9 9900X (-20Mv PBO 85°C)
• Motherboard: ASRock X870 Steel Legend WiFi (BIOS Version: 4.03)
• RAM: 65,536 MB (4x16GB Config) @ 6000MHz CL30
• AIDA64 Results: Read: 80,177 MB/s | Write: 85,802 MB/s | Latency: 70.2 ns (Amazing for 4 sticks 1:1)
• 3DMark Time Spy: Overall Score 26,497 (Better than 95% of all results)
• Time Spy Extreme Stress Test: Passed with 98.0% stability

AIDA64 RAM test

🛠️ My Exact BIOS Settings (See Attached Screenshots for Sub-timings):

If you are trying to clone this on your X870 board, do NOT just blindly leave things on Auto. You need to manually tune the voltages and crucial sub-timings to combat the 2DPC signal noise:

• FCLK / UCLK Ratio: FCLK manually set to 2000 MHz, UCLK DIV1 Mode forced to UCLK=MEMCLK (1:1).
• SoC Voltage: Fixed Mode at 1.280V (Safely under the 1.30V AM5 ceiling to stabilize the IMC).
• DRAM VDD / VDDQ / VDDIO: 1.400V (Gives the Hynix dies enough muscle to lock CL30).
• VDDP / VDD Misc: 1.150V / 1.100V

Key Primary Sub-Timings tuned for stability:

• tCL-tRCD-tRP-tRAS: 30-36-36-76 CR1
• tRC: 112
• tWR: 90
• tREFI: Maxed out at 65535 (Massive help for AIDA64 latency)
• tRFC1 / tRFC2 / tRFCSb: 500 / 400 / 300

I know the golden rule of DDR5 has always been "only use 2 sticks", but it looks like with the maturity of Zen 5's IMC and X870 motherboard topology, the 4-stick 1:1 dream is finally fully viable and rock-solid for daily 3A gaming

Feel free to ask me anything about my sub-timings or setup. Let's get those slots filled! And also try at your own risk

RAM timing settings

CPU voltage & RAM settings

Time Spy Score 26497

Time Spy Extreme stress test passed

3D Marks full specs detail

AMD 9900x -20Mv

I saw so many DDR4 kits going up like insane, I'm not sure will affect DDR4 kit even higher or not, my DDR5 kit T force 6000Mhz CL30 32GB (16GBx2) price from A$179 to A$799 now, thinking about to build a secondary PC but those prices scare me