Zilog Z80 50th aniversary (July 1976)

Some notable microcomputers and consoles:

* TRS-80 Model I (1977)

* TRS-80 Model III

*TRS-80 Model 4

*Sinclair ZX80

*Sinclair ZX81

*ZX Spectrum

*Amstrad CPC 464

*Amstrad CPC 664

*Amstrad CPC 6128

*MSX computers

*Sharp MZ-80K

*Kaypro II

*Osborne 1

*Sega SG-1000

*Sega Master System

*Sega Game Gear

* Game Boy (uses the Sharp LR35902, a CPU derived from the Z80 and Intel 8080, not a full Z80)

...As secondary cpu:

*Sega Genesis / Mega Drive (sound CPU)

*SNK Neo Geo AES (audio CPU)

*SNK Neo Geo MVS (audio CPU)

Famous arcades:

*Pac-Man

*Galaga

*Bubble Bobble

*Double Dragon

and countless other machines and handleds

u/Distinct-Question-16 — 2 days ago

NVIDIA ASPIRE enables robots to accumulate knowledge from successful experiences and reuse it for new tasks, creating a persistent library of skills that improves learning over time

Traditionally, robots learn each task from start to finish. If they fail, they usually just rely on what the model already learned and may need to try again many times.

With ASPIRE, the robot stores skills from tasks it has successfully done before. If it fails on a new task, it can reuse a similar skill to fix that step instead of starting over. This helps the robot complete tasks more easily and learn faster over time.

youtu.be
u/Distinct-Question-16 — 4 days ago
▲ 2.9k r/BitchImATrain+1 crossposts

Suspenden railway Wuppertal, Germany, Eugen Langen 1902

Its the oldest electric elevated railway with hanging cars in the world.

Short film from 1902 shot in 68 mm, and upscaled in 4K by MoMA.

Some of the structure seems very retrofuturistic.

u/Distinct-Question-16 — 6 days ago

Meta improves Brain2QWERTY, a system that can decode text from brain activity to enable typing using non-invasive technologies, MEG and EEG

u/Distinct-Question-16 — 6 days ago
▲ 1.9k r/generativeAI+1 crossposts

Meanwhile in China, 10,000+ delivery bots are transforming last-mile fulfillment by making deliveries faster, cheaper, and more autonomous

u/Distinct-Question-16 — 7 days ago
▲ 901 r/FDVR_Dream+1 crossposts

Aleph Neuro and its partner, Butterfly Network claims it has produced the highest-resolution 3D images of the human brain ever obtained from outside the skull using ultrasound-on-a-chip

https://www.businesswire.com/news/home/20260625817511/en/Butterfly-Networks-Embedded-Partner-Aleph-Neuro-Unveils-Stunning-Brain-Images

The system is built on Butterfly's Ultrasound-on-Chip™ semiconductor technology.

Aleph says the images achieve "MRI-level detail" while avoiding the size and cost of MRI scanners and without invasive procedures.

The reported imaging was performed through the intact skull, using an ultrasound contrast agent to enhance the signal

u/Distinct-Question-16 — 9 days ago

OpenAI and Broadcom unveil LLM-optimized inference chip

“We optimized the architecture around the kernels, memory movement, networking, and serving patterns that matter most for frontier AI models. Based on early testing, Jalapeño will efficiently execute our most important workloads close to the hardware’s theoretical limits.”

While OpenAI is still measuring final performance, early testing shows that Jalapeño will deliver performance per watt substantially better than current state-of-the-art. A detailed technical report on performance will be presented in the coming months.

openai.com
u/Distinct-Question-16 — 11 days ago

Today June 26, SCSI first standard turns 40 years

First introduced in the early 1980s and standardized in 1986 as SCSI-1, the technology evolved from an earlier interface called SASI (Shugart Associates System Interface), developed at Shugart Associates under engineers like the key one Larry Boucher. SASI was an early attempt to standardize communication between a computer and storage devices using a controller-based bus abstraction.

SCSI extended and formalized these ideas, aiming to standardize communication between a computer and peripheral devices using a shared bus and structured command packets. The goal was to replace low-level, device-specific control, often involving direct manipulation of I/O ports or memory-mapped registers and proprietary controller logic, with a more uniform, device-independent command protocol.

Instead of the CPU directly controlling hardware registers, SCSI uses command blocks (CDBs) sent to devices, which execute the requested operation internally and respond when ready.

The standard also defined both the electrical interface and signaling of the physical bus, enabling multiple devices to share the same connection in a daisy-chained, terminated bus topology.

u/Distinct-Question-16 — 12 days ago